1. Field of the Invention
This invention is related to the field of processors for computer systems and, more particularly, to supporting multiple instruction set architectures within a computer system.
2. Description of the Related Art
Computer systems have become an important productivity tool in many environments. Nearly all lines of work benefit from a computer system to carry out many tasks which are central to that work. For example, managerial professionals use computer systems for managing data bases of business-critical data, creating and managing documents, etc. Engineering professionals use computer systems for researching, designing, and verifying products. Manufacturing and distribution centers use computer systems to control manufacturing machines, to track products through the manufacturing process, for inventory control, and to manage distribution products to wholesale/retail centers. All of the above may use computer systems for communications as well via email, the Internet, intranets, etc. Home uses for computer systems abound as well, including financial management, communication, and entertainment. Many other uses for computer systems exist.
As the above illustrates, a large diverse set of uses for computer systems have been developed. Generally, these uses are supported by a variety of application programs designed to execute under an operating system provided for the computer system. The operating system provides an interface between the application programs and the computer system hardware. Each computer system may have a variety of differences in hardware configuration (e.g. amount of memory, number and type of input/output (I/O) devices, etc.). The operating system insulates the application program from the hardware differences. Accordingly, the application program may often times be designed without regard for the exact hardware configuration upon which the application program is to execute. Additionally, the operating system provides a variety of low level services which many different types of application programs may need, allowing the application programs to rely on the operating system services instead of programming these services internal to the application program. Generally, the operating system provides scheduling of tasks (e.g. different application programs which may be operating concurrently), management and allocation of system resources such as I/O devices and memory, error handling (e.g. an application program operating erroneously), etc. Examples of operating systems are the Windows operating system (including Windows 95 and Windows NT), UNIX, DOS, and MAC-OS, among others. Conversely, an application program provides specific user functionality to accomplish a specific user task. Word processors, spreadsheets, graphics design programs, inventory management programs, etc. are examples of application programs.
Therefore, application programs are typically designed to operate upon a particular operating system. The services available from the operating system (xe2x80x9coperating system routinesxe2x80x9d) are optionally used by the application program. Additionally, the application program conforms to the requirements of the operating system.
One hardware feature which the operating system does not typically insulate the application program from is the instruction set architecture of the processors within the computer system. Generally, an instruction set architecture defines the instructions which execute upon the processors, as well as processor resources directly used by the instructions (such as registers, etc.). The application program is generally compiled into a set of instructions defined by the instruction set architecture, and hence the operating system does not insulate the application program from this feature of the computer system hardware.
As described above, a computer system must support a large number of different types of application programs to be useful to a large base of customers. Processors employing newly developed instruction set architectures face a daunting task of enticing application developers to develop applications designed for the new instruction set architecture. However, without the application programs, the instruction set architecture and the processors designed therefor will often achieve only limited market acceptance, at best.
It is difficult and time consuming to recreate application programs using the new instruction set architecture due to the large number of application programs and the time and effort needed to xe2x80x9cportxe2x80x9d each application program to the new instruction set architecture. Furthermore, the source code for many application programs may be unavailable to those desiring to perform the port. On the other hand, operating systems are fewer in number (particularly those with widespread acceptance) and may be ported to a variety of instruction set architectures. For example, Windows NT has supported the Alpha architecture developed by Digital Equipment Corporation, the PowerPC architecture developed by IBM and Motorola, and the MIPS architecture, in addition to the x86 architecture.
In order to provide a large applications base, thereby generating market acceptance which may lead to more application programs being developed, a computer system based on processors employing the newly developed instruction set architecture may attempt to support applications coded to a different instruction set architecture. Herein, code using instructions defined by the instruction set architecture employed by the processors in a computer system is referred to as xe2x80x9cnativexe2x80x9d or xe2x80x9chostxe2x80x9d, while code using instructions defined by a different instruction set architecture is referred to as xe2x80x9cnonnativexe2x80x9d or xe2x80x9cforeignxe2x80x9d.
The x86 architecture (also referred to as IA-32 or APX) has one of the largest application program bases in the history of computing. A large percentage of these programs are developed to run under the Windows operating system. While Windows and the x86 application programs are used periodically as an example herein, the techniques and hardware disclosed herein are not limited to this instruction set architecture and operating system. Any operating system and instruction set architecture may be used.
New computer systems, whose host processor is non-x86, may provide support for x86 (i.e. foreign) application programs running under the Windows operating system while application programs are developed for the non-x86 host processor. Two methods which have been used to support foreign applications in a computer system are software emulation and binary translation. Software emulation generally comprises reading each instruction in the application program as the instruction is selected for execution and performing an equivalent instruction sequence in the host architecture. Binary translation generally involves translating each instruction in the application program into an equivalent instruction sequence prior to executing the program, and then executing the translated program sequence.
Unfortunately, because each foreign instruction is examined during execution of the program, software emulation provides significantly reduced performance of the application program than that achievable on a computer system employing the foreign instruction set architecture. Furthermore, more memory is required to execute the application program, in order to store the emulation program and supporting data structures. If the application program includes real time features (e.g. audio and video), these features may operate poorly because of the excessive execution time. Still further, processor implementations of an instruction set architecture often include a variety of undocumented features (both known and unknown) which must be modeled by the software emulator. Furthermore, complex hardware features (such as the x86 floating point register stack) are difficult to model accurately in the software emulator.
Binary translation suffers from several drawbacks as well. Binary translation is not transparent to the user. Binary translation often requires multiple passes through the application program code to successfully translate the program. In the interim, software emulation may be used to execute the application (with many of the aforementioned drawbacks). Sometimes, a complete translation is not achieved, and hence software emulation is still required.
Several combinations of the above approaches have been employed by computer system companies and operating system companies. For example, Digital Equipment Corporation offers its FX!32 system and Microsoft offers its Wx86 extension to Windows NT. However, while these approaches have provided functionality, the high performance desired of the foreign applications has generally not been satisfied.
The problems outlined above are in large part solved by a computer system employing a host processor and an emulation coprocessor in accordance with the present invention. The host processor includes hardware configured to execute instructions defined by a host instruction set architecture, while the emulation coprocessor includes hardware configured to execute instructions defined by a different instruction set architecture from the host instruction set architecture (xe2x80x9cthe foreign instruction set architecturexe2x80x9d). The host processor executes operating system code as well as application programs which are coded in the host instruction set architecture. Upon initiation of a foreign application program, the host processor communicates with the emulation coprocessor to cause the emulation coprocessor core to execute the foreign application program.
Advantageously, application programs coded according to the foreign instruction set architecture can be executed directly in hardware. Execution performance of the application program may be substantially greater than that of a software emulation or binary translation methodology. Moreover, execution performance may be substantially similar to execution performance of the application program within a computer system based upon a processor employing the foreign instruction set architecture, thereby preserving much of the real-time behavior of the foreign application program. Software emulation/binary translation methodologies and combinations thereof may be eliminated in favor of hardware execution of the foreign application program. Because the emulation coprocessor includes hardware functionality for executing the foreign instruction set architecture, the difficulties of accurate architecture modeling may be eliminated. The combination of these various advantages may provide a high level performance, allowing the foreign application execution performance to be highly acceptable to a user. Accordingly, market acceptance of the computer system based upon the host instruction set architecture may be increased. As market acceptance increases, the number of application programs coded for the host instruction set architecture may increase as well. Long-term success and viability of the host instruction set architecture may therefore be more likely.
Providing hardware functionality for the foreign instruction set architecture within the computer system generates additional advantages. In particular, the computer system may be characterized as a heterogeneous multiprocessing system. While the emulation coprocessor is executing the foreign application program, the host processor may execute operating system routines unrelated to the foreign application program or may execute a host application program. Advantageously, the computer system may achieve a substantially higher throughput on both host and foreign code that would be achievable via computer system employing only the host processor and software emulation/binary translation for the foreign instruction set architecture.
Broadly speaking, the present invention contemplates an apparatus for a computer system comprising a first processor and a second processor. The first processor is configured to execute first instructions defined by a first instruction set architecture. An operating system employed by the computer system is coded using the first instructions. Coupled to the first processor, the second processor is configured to execute second instructions defined by a second instruction set architecture different than the first instruction set architecture. An application program designed to execute within the operating system is coded using the second instructions. The second processor is configured to execute the application program while the first processor is configured to execute the operating system. Additionally, the second processor is configured to communicate with the first processor upon detecting a use of an operating system routine for the application program.
The present invention farther contemplates a heterogeneous multiprocessing system comprising a first processor, a second process, an operating system, and an application program. The first processor is configured to execute first instructions defined by a first instruction set architecture. The second processor is coupled to the first processor, and is configured to execute second instructions defined by a second instruction set architecture different than the first instruction set architecture. The operating system is coded using the first instructions, while the application program is coded using the second instructions and designed to execute within the operating system. The second processor is configured to execute the application program and the first processor is configured to concurrently execute a process unrelated to the application program.
Moreover, the present invention contemplates a method for executing an application program coded using instructions from a first instruction set architecture and designed to execute within an operating system coded using instructions from a second instruction set architecture different from the first instruction set architecture. Initiation of the application program is detected by the operating system executing upon a first processor configured to execute instructions from the second instruction set architecture. A context for the application program is established in a second processor configured to execute instructions from the first instruction set architecture. The application program is executed upon the second processor.